docs(dn)-Ghala-Buarish-11/23/25 (#437)

Author: Ghqlq

src/design_notebooks/2025fall/gb2789.md

@@ -98,4 +98,13 @@ I keep getting error `CMake Error at CMakeLists.txt:8 (nyu_link_sv):
 
 [Processor-Design VIP Project repository](https://github.com/Ghqlq/Processor-Design-Projects) - updated folder: Lab2_Ghala
 
-**Discussion:** After experimenting more with CMake and Ninja, I have more understanding of how to use them. This is my first time using SystemVerilog, but it's not that much different. I still need to familiarize myself with the differences. 
+**Discussion:** After experimenting more with CMake and Ninja, I have more understanding of how to use them. This is my first time using SystemVerilog, but it's not that much different. I still need to familiarize myself with the differences. 
+
+## Week11: 11/17/25 - 11/23/25
+- Completed lab 3 from onboarding labs
+- Edited lab 2; previously it was commited with a hidden .git folder.
+- Started lab 4
+
+[Processor-Design VIP Project repository](https://github.com/Ghqlq/Processor-Design-Projects) - New folder: Lab3_Ghala
+
+**Discussion:** Even though we wrote a tb during RiSC-16 project, This is my first time writing testbench in C++ for SystemVerilog modules. Some new keywords were "TEST_CASE", "REQUIRE", ".eval", "tick".