From 0d32b8c132a3783834461a9e77b2c6b80de95089 Mon Sep 17 00:00:00 2001 From: Ghqlq Date: Tue, 9 Dec 2025 10:55:48 -0500 Subject: [PATCH] docs(dn)-Ghala-Buarish-12/07/25 --- src/design_notebooks/2025fall/gb2789.md | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/src/design_notebooks/2025fall/gb2789.md b/src/design_notebooks/2025fall/gb2789.md index 763bc0b..1bdf7e8 100644 --- a/src/design_notebooks/2025fall/gb2789.md +++ b/src/design_notebooks/2025fall/gb2789.md @@ -114,4 +114,15 @@ I keep getting error `CMake Error at CMakeLists.txt:8 (nyu_link_sv): [Processor-Design VIP Project repository](https://github.com/Ghqlq/Processor-Design-Projects) - New folder: Lab4_Ghala -**Discussion:** In this lab I got an intro into the actual verification toolchain. We got to know how different tools (vcpkg, CMake, Catch2, Verilator...) work together to create the verification process. I understood the entire flow, however, I still need more practice to be able to do all this without a guided lab. \ No newline at end of file +**Discussion:** In this lab I got an intro into the actual verification toolchain. We got to know how different tools (vcpkg, CMake, Catch2, Verilator...) work together to create the verification process. I understood the entire flow, however, I still need more practice to be able to do all this without a guided lab. + +## Week13: 12/01/25 - 12/07/25 +- Compiled RiSC-16 processor components and validated execution using files provided by Noah. + +[Processor-Design VIP Project repository](https://github.com/Ghqlq/Processor-Design-Projects) - New folder: RiSC-16_Ghala + +**Discussion:** The main issues initially came from register_file.v, my inputs include 'instructions' where I do the decoding of rA,rB,rC inside instruction memory module. But corrected it to match the TB where rA,rB,rC are inputs instead of full instruction. + +Another issue is in my instruction_mem.v, you'd have to input the instructions manually. I fixed it to read binary from program.mem. + +It's really nice seeing all the components brought together. \ No newline at end of file