Skip to content

Commit 04462ee

Browse files
committed
Add vsim outputs and model to gitignore
1 parent 9a86747 commit 04462ee

File tree

1 file changed

+6
-1
lines changed

1 file changed

+6
-1
lines changed

.gitignore

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,8 @@
11
.bender
22
scripts/compile.tcl
3-
models/s27ks0641
3+
axi_log/
4+
work/
5+
transcript
6+
modelsim.ini
7+
vsim.wlf
8+
models/s27ks0641

0 commit comments

Comments
 (0)