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system: WL: update STM32WLxx HAL Drivers to v1.1.0
Included in STM32CubeWL FW v1.1.0 Signed-off-by: Frederic Pillon <[email protected]>
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‎system/Drivers/STM32WLxx_HAL_Driver/Inc/Legacy/stm32_hal_legacy.h‎

Lines changed: 157 additions & 110 deletions
Large diffs are not rendered by default.

‎system/Drivers/STM32WLxx_HAL_Driver/Inc/stm32wlxx_hal_adc.h‎

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -132,8 +132,7 @@ typedef struct
132132

133133
FunctionalState LowPowerAutoPowerOff; /*!< Select the auto-off mode: the ADC automatically powers-off after a conversion and automatically wakes-up when a new conversion is triggered (with startup time between trigger and start of sampling).
134134
This feature can be combined with automatic wait mode (parameter 'LowPowerAutoWait').
135-
This parameter can be set to ENABLE or DISABLE.
136-
Note: If enabled, this feature also turns off the ADC dedicated 14 MHz RC oscillator (HSI14) */
135+
This parameter can be set to ENABLE or DISABLE. */
137136

138137
FunctionalState ContinuousConvMode; /*!< Specify whether the conversion is performed in single mode (one conversion) or continuous mode for ADC group regular,
139138
after the first ADC conversion start trigger occurred (software start or external trigger).
@@ -473,7 +472,7 @@ typedef void (*pADC_CallbackTypeDef)(ADC_HandleTypeDef *hadc); /*!< pointer to
473472
/** @defgroup ADC_HAL_EC_DATA_ALIGN ADC conversion data alignment
474473
* @{
475474
*/
476-
#define ADC_DATAALIGN_RIGHT (LL_ADC_DATA_ALIGN_RIGHT)/*!< ADC conversion data alignment: right aligned (alignment on data register LSB bit 0)*/
475+
#define ADC_DATAALIGN_RIGHT (LL_ADC_DATA_ALIGN_RIGHT) /*!< ADC conversion data alignment: right aligned (alignment on data register LSB bit 0)*/
477476
#define ADC_DATAALIGN_LEFT (LL_ADC_DATA_ALIGN_LEFT) /*!< ADC conversion data alignment: left aligned (alignment on data register MSB bit 15)*/
478477
/**
479478
* @}
@@ -1668,8 +1667,8 @@ void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc);
16681667
* @{
16691668
*/
16701669
/* Peripheral Control functions ***********************************************/
1671-
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef *hadc, ADC_ChannelConfTypeDef *sConfig);
1672-
HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef *hadc, ADC_AnalogWDGConfTypeDef *AnalogWDGConfig);
1670+
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef *hadc, ADC_ChannelConfTypeDef *pConfig);
1671+
HAL_StatusTypeDef HAL_ADC_AnalogWDGConfig(ADC_HandleTypeDef *hadc, ADC_AnalogWDGConfTypeDef *pAnalogWDGConfig);
16731672

16741673
/**
16751674
* @}

‎system/Drivers/STM32WLxx_HAL_Driver/Inc/stm32wlxx_hal_cortex.h‎

Lines changed: 31 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -187,9 +187,12 @@ typedef struct
187187
/** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size
188188
* @{
189189
*/
190+
#if defined(CORE_CM0PLUS)
191+
#else
190192
#define MPU_REGION_SIZE_32B ((uint8_t)0x04)
191193
#define MPU_REGION_SIZE_64B ((uint8_t)0x05)
192194
#define MPU_REGION_SIZE_128B ((uint8_t)0x06)
195+
#endif
193196
#define MPU_REGION_SIZE_256B ((uint8_t)0x07)
194197
#define MPU_REGION_SIZE_512B ((uint8_t)0x08)
195198
#define MPU_REGION_SIZE_1KB ((uint8_t)0x09)
@@ -379,6 +382,33 @@ void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
379382
((NUMBER) == MPU_REGION_NUMBER6) || \
380383
((NUMBER) == MPU_REGION_NUMBER7))
381384

385+
#if defined(CORE_CM0PLUS)
386+
#define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_256B) || \
387+
((SIZE) == MPU_REGION_SIZE_512B) || \
388+
((SIZE) == MPU_REGION_SIZE_1KB) || \
389+
((SIZE) == MPU_REGION_SIZE_2KB) || \
390+
((SIZE) == MPU_REGION_SIZE_4KB) || \
391+
((SIZE) == MPU_REGION_SIZE_8KB) || \
392+
((SIZE) == MPU_REGION_SIZE_16KB) || \
393+
((SIZE) == MPU_REGION_SIZE_32KB) || \
394+
((SIZE) == MPU_REGION_SIZE_64KB) || \
395+
((SIZE) == MPU_REGION_SIZE_128KB) || \
396+
((SIZE) == MPU_REGION_SIZE_256KB) || \
397+
((SIZE) == MPU_REGION_SIZE_512KB) || \
398+
((SIZE) == MPU_REGION_SIZE_1MB) || \
399+
((SIZE) == MPU_REGION_SIZE_2MB) || \
400+
((SIZE) == MPU_REGION_SIZE_4MB) || \
401+
((SIZE) == MPU_REGION_SIZE_8MB) || \
402+
((SIZE) == MPU_REGION_SIZE_16MB) || \
403+
((SIZE) == MPU_REGION_SIZE_32MB) || \
404+
((SIZE) == MPU_REGION_SIZE_64MB) || \
405+
((SIZE) == MPU_REGION_SIZE_128MB) || \
406+
((SIZE) == MPU_REGION_SIZE_256MB) || \
407+
((SIZE) == MPU_REGION_SIZE_512MB) || \
408+
((SIZE) == MPU_REGION_SIZE_1GB) || \
409+
((SIZE) == MPU_REGION_SIZE_2GB) || \
410+
((SIZE) == MPU_REGION_SIZE_4GB))
411+
#else
382412
#define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_32B) || \
383413
((SIZE) == MPU_REGION_SIZE_64B) || \
384414
((SIZE) == MPU_REGION_SIZE_128B) || \
@@ -407,7 +437,7 @@ void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
407437
((SIZE) == MPU_REGION_SIZE_1GB) || \
408438
((SIZE) == MPU_REGION_SIZE_2GB) || \
409439
((SIZE) == MPU_REGION_SIZE_4GB))
410-
440+
#endif
411441
#define IS_MPU_SUB_REGION_DISABLE(SUBREGION) ((SUBREGION) < (uint16_t)0x00FFU)
412442
#endif /* __MPU_PRESENT */
413443

‎system/Drivers/STM32WLxx_HAL_Driver/Inc/stm32wlxx_hal_def.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,7 @@
2828

2929
/* Includes ------------------------------------------------------------------*/
3030
#include "stm32wlxx.h"
31-
#include "Legacy/stm32_hal_legacy.h" /* Aliases file for old names compatibility */
31+
#include "Legacy/stm32_hal_legacy.h" /* Aliases file for old names compatibility */
3232
#include <stddef.h>
3333

3434
/* Exported types ------------------------------------------------------------*/

‎system/Drivers/STM32WLxx_HAL_Driver/Inc/stm32wlxx_hal_dma.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -347,7 +347,7 @@ typedef struct __DMA_HandleTypeDef
347347
/** @defgroup DMA_Channel_Attributes DMA Channel Attributes
348348
* @brief DMA channel secure or non-secure and privileged or non-privileged attributes
349349
* @note Secure and non-secure attributes are only available from secure when the system
350-
* implements the security (TZEN=1)
350+
* implements the security (ESE=1)
351351
* @{
352352
*/
353353

‎system/Drivers/STM32WLxx_HAL_Driver/Inc/stm32wlxx_hal_flash.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -123,7 +123,7 @@ typedef struct
123123
uint32_t C2DebugAccessMode; /*!< CPU2 debug access enabled or disabled (used for OPTIONBYTE_C2_DEBUG_ACCESS).
124124
This parameter can be a value of @ref FLASH_OB_C2_DEBUG_ACCESS */
125125
uint32_t C2BootRegion; /*!< CPU2 Secure Boot memory region(used for OPTIONBYTE_C2_BOOT_VECT).
126-
This parameter can be a value of @ref C2_FLASH_OB_BOOT_REGION */
126+
This parameter can be a value of @ref FLASH_OB_C2_BOOT_REGION */
127127
uint32_t C2SecureBootVectAddr; /*!< CPU2 Secure Boot reset vector (used for OPTIONBYTE_C2_BOOT_VECT).
128128
This parameter contains the CPU2 boot reset start address within
129129
the selected memory region. Make sure this parameter is word aligned. */
@@ -561,7 +561,7 @@ typedef struct
561561
* @}
562562
*/
563563

564-
/** @defgroup C2_FLASH_OB_BOOT_REGION CPU2 Option Bytes Reset Boot Vector
564+
/** @defgroup FLASH_OB_C2_BOOT_REGION CPU2 Option Bytes Reset Boot Vector
565565
* @{
566566
*/
567567
#define OB_C2_BOOT_FROM_SRAM 0x00000000U /*!< CPU2 boot from SRAM1 or SRAM2 */

‎system/Drivers/STM32WLxx_HAL_Driver/Inc/stm32wlxx_hal_gpio.h‎

Lines changed: 50 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -107,26 +107,25 @@ typedef enum
107107

108108
/** @defgroup GPIO_mode GPIO mode
109109
* @brief GPIO Configuration Mode
110-
* Elements values convention: 0xX0yz00YZ
111-
* - X : GPIO mode or EXTI Mode
112-
* - y : External IT or Event trigger detection
113-
* - z : IO configuration on External IT or Event
114-
* - Y : Output type (Push Pull or Open Drain)
115-
* - Z : IO Direction mode (Input, Output, Alternate or Analog)
110+
* Elements values convention: 0x00WX00YZ
111+
* - W : EXTI trigger detection on 3 bits
112+
* - X : EXTI mode (IT or Event) on 2 bits
113+
* - Y : Output type (Push Pull or Open Drain) on 1 bit
114+
* - Z : GPIO mode (Input, Output, Alternate or Analog) on 2 bits
116115
* @{
117116
*/
118-
#define GPIO_MODE_INPUT (0x00000000U) /*!< Input Floating Mode */
119-
#define GPIO_MODE_OUTPUT_PP (0x00000001U) /*!< Output Push Pull Mode */
120-
#define GPIO_MODE_OUTPUT_OD (0x00000011U) /*!< Output Open Drain Mode */
121-
#define GPIO_MODE_AF_PP (0x00000002U) /*!< Alternate Function Push Pull Mode */
122-
#define GPIO_MODE_AF_OD (0x00000012U) /*!< Alternate Function Open Drain Mode */
123-
#define GPIO_MODE_ANALOG (0x00000003U) /*!< Analog Mode */
124-
#define GPIO_MODE_IT_RISING (0x10110000U) /*!< External Interrupt Mode with Rising edge trigger detection */
125-
#define GPIO_MODE_IT_FALLING (0x10210000U) /*!< External Interrupt Mode with Falling edge trigger detection */
126-
#define GPIO_MODE_IT_RISING_FALLING (0x10310000U) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
127-
#define GPIO_MODE_EVT_RISING (0x10120000U) /*!< External Event Mode with Rising edge trigger detection */
128-
#define GPIO_MODE_EVT_FALLING (0x10220000U) /*!< External Event Mode with Falling edge trigger detection */
129-
#define GPIO_MODE_EVT_RISING_FALLING (0x10320000U) /*!< External Event Mode with Rising/Falling edge trigger detection */
117+
#define GPIO_MODE_INPUT MODE_INPUT /*!< Input Floating Mode */
118+
#define GPIO_MODE_OUTPUT_PP (MODE_OUTPUT | OUTPUT_PP) /*!< Output Push Pull Mode */
119+
#define GPIO_MODE_OUTPUT_OD (MODE_OUTPUT | OUTPUT_OD) /*!< Output Open Drain Mode */
120+
#define GPIO_MODE_AF_PP (MODE_AF | OUTPUT_PP) /*!< Alternate Function Push Pull Mode */
121+
#define GPIO_MODE_AF_OD (MODE_AF | OUTPUT_OD) /*!< Alternate Function Open Drain Mode */
122+
#define GPIO_MODE_ANALOG MODE_ANALOG /*!< Analog Mode */
123+
#define GPIO_MODE_IT_RISING (MODE_INPUT | EXTI_IT | TRIGGER_RISING) /*!< External Interrupt Mode with Rising edge trigger detection */
124+
#define GPIO_MODE_IT_FALLING (MODE_INPUT | EXTI_IT | TRIGGER_FALLING) /*!< External Interrupt Mode with Falling edge trigger detection */
125+
#define GPIO_MODE_IT_RISING_FALLING (MODE_INPUT | EXTI_IT | TRIGGER_RISING | TRIGGER_FALLING) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
126+
#define GPIO_MODE_EVT_RISING (MODE_INPUT | EXTI_EVT | TRIGGER_RISING) /*!< External Event Mode with Rising edge trigger detection */
127+
#define GPIO_MODE_EVT_FALLING (MODE_INPUT | EXTI_EVT | TRIGGER_FALLING) /*!< External Event Mode with Falling edge trigger detection */
128+
#define GPIO_MODE_EVT_RISING_FALLING (MODE_INPUT | EXTI_EVT | TRIGGER_RISING | TRIGGER_FALLING) /*!< External Event Mode with Rising/Falling edge trigger detection */
130129
/**
131130
* @}
132131
*/
@@ -135,10 +134,10 @@ typedef enum
135134
* @brief GPIO Output Maximum frequency
136135
* @{
137136
*/
138-
#define GPIO_SPEED_FREQ_LOW (0x00000000U) /*!< Low speed */
139-
#define GPIO_SPEED_FREQ_MEDIUM (0x00000001U) /*!< Medium speed */
140-
#define GPIO_SPEED_FREQ_HIGH (0x00000002U) /*!< High speed */
141-
#define GPIO_SPEED_FREQ_VERY_HIGH (0x00000003U) /*!< Very high speed */
137+
#define GPIO_SPEED_FREQ_LOW 0x00000000u /*!< Low speed */
138+
#define GPIO_SPEED_FREQ_MEDIUM 0x00000001u /*!< Medium speed */
139+
#define GPIO_SPEED_FREQ_HIGH 0x00000002u /*!< High speed */
140+
#define GPIO_SPEED_FREQ_VERY_HIGH 0x00000003u /*!< Very high speed */
142141
/**
143142
* @}
144143
*/
@@ -147,9 +146,9 @@ typedef enum
147146
* @brief GPIO Pull-Up or Pull-Down Activation
148147
* @{
149148
*/
150-
#define GPIO_NOPULL (0x00000000U) /*!< No Pull-up or Pull-down activation */
151-
#define GPIO_PULLUP (0x00000001U) /*!< Pull-up activation */
152-
#define GPIO_PULLDOWN (0x00000002U) /*!< Pull-down activation */
149+
#define GPIO_NOPULL 0x00000000u /*!< No Pull-up or Pull-down activation */
150+
#define GPIO_PULLUP 0x00000001u /*!< Pull-up activation */
151+
#define GPIO_PULLDOWN 0x00000002u /*!< Pull-down activation */
153152
/**
154153
* @}
155154
*/
@@ -208,6 +207,32 @@ typedef enum
208207
*/
209208

210209
/* Private macros ------------------------------------------------------------*/
210+
/** @defgroup GPIO_Private_Constants GPIO Private Constants
211+
* @{
212+
*/
213+
#define GPIO_MODE_Pos 0u
214+
#define GPIO_MODE (0x3uL << GPIO_MODE_Pos)
215+
#define MODE_INPUT (0x0uL << GPIO_MODE_Pos)
216+
#define MODE_OUTPUT (0x1uL << GPIO_MODE_Pos)
217+
#define MODE_AF (0x2uL << GPIO_MODE_Pos)
218+
#define MODE_ANALOG (0x3uL << GPIO_MODE_Pos)
219+
#define OUTPUT_TYPE_Pos 4u
220+
#define OUTPUT_TYPE (0x1uL << OUTPUT_TYPE_Pos)
221+
#define OUTPUT_PP (0x0uL << OUTPUT_TYPE_Pos)
222+
#define OUTPUT_OD (0x1uL << OUTPUT_TYPE_Pos)
223+
#define EXTI_MODE_Pos 16u
224+
#define EXTI_MODE (0x3uL << EXTI_MODE_Pos)
225+
#define EXTI_IT (0x1uL << EXTI_MODE_Pos)
226+
#define EXTI_EVT (0x2uL << EXTI_MODE_Pos)
227+
#define TRIGGER_MODE_Pos 20u
228+
#define TRIGGER_MODE (0x7uL << TRIGGER_MODE_Pos)
229+
#define TRIGGER_RISING (0x1uL << TRIGGER_MODE_Pos)
230+
#define TRIGGER_FALLING (0x2uL << TRIGGER_MODE_Pos)
231+
232+
/**
233+
* @}
234+
*/
235+
211236
/** @defgroup GPIO_Private_Macros GPIO Private Macros
212237
* @{
213238
*/

‎system/Drivers/STM32WLxx_HAL_Driver/Inc/stm32wlxx_hal_gtzc.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -121,7 +121,7 @@ typedef struct
121121
* @note that two maximum values are also defined here:
122122
* - max number of securable AHB/APB peripherals or masters (used in
123123
* TZSC sub-block)
124-
* - max number of securable and TrustZone-aware AHB/APB peripherals
124+
* - max number of securable and security-aware AHB/APB peripherals
125125
* or masters (used in TZIC sub-block)
126126
* @{
127127
*/
@@ -146,7 +146,7 @@ typedef struct
146146
/* Note that two maximum values are also defined here:
147147
* - max number of securable peripherals
148148
* (used in TZSC sub-block)
149-
* - max number of securable and TrustZone-aware peripherals or masters
149+
* - max number of securable and security-aware peripherals or masters
150150
* (used in TZIC sub-block)
151151
*/
152152
#define GTZC_TZSC_PERIPH_NUMBER 4U

‎system/Drivers/STM32WLxx_HAL_Driver/Inc/stm32wlxx_hal_hsem.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@ extern "C" {
4343

4444
/**
4545
* @brief SemID to mask helper Macro.
46-
* @param __SEMID__: semaphore ID from 0 to 31
46+
* @param __SEMID__: semaphore ID from 0 to 15
4747
* @retval Semaphore Mask.
4848
*/
4949
#define __HAL_HSEM_SEMID_TO_MASK(__SEMID__) (1 << (__SEMID__))

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