Compile errors for RISC-V embedded vector extension

[jongsung-dno]

Hello,

This RISC-V cpu doesn't support full vector extension.
The maximum vector element size (ELEN) is 32 and support Zve32f.

If I build xsimd with -march=rv64imafdc_zve32f_zba_zbb_zbc_zbs_zfh_zfbfmin_zvl128b -mrvv-vector-bits=zvl, there are compile errors related to ELEN.
I tried to remove all 64bit related part, but I understand the macros and it seems takes much time to complete.
Anybody can help me how to do this job?

error: RISC-V type 'type' (aka '__rvv_int64m8_t') requires the 'zve64x' extension

In file included from /home/jongsung/github/jongsung/riscv_port/xsimd/memory/../config/../types/xsimd_all_registers.hpp:47:
/home/jongsung/github/jongsung/riscv_port/xsimd/memory/../config/../types/xsimd_rvv_register.hpp:118:13: error: RISC-V type 'type' (aka '__rvv_int64m8_t') requires the 'zve64x' extension
  118 |             XSIMD_RVV_MAKE_TYPES(8)
      |             ^
/home/jongsung/github/jongsung/riscv_port/xsimd/memory/../config/../types/xsimd_rvv_register.hpp:114:5: note: expanded from macro 'XSIMD_RVV_MAKE_TYPES'
  114 |     XSIMD_RVV_MAKE_TYPE(int64_t, i, 64, vmul)  \
      |     ^
/home/jongsung/github/jongsung/riscv_port/xsimd/memory/../config/../types/xsimd_rvv_register.hpp:91:34: note: expanded from macro 'XSIMD_RVV_MAKE_TYPE'
   91 |         static XSIMD_INLINE type bitcast(U x) noexcept                                    \
      |                                  ^
/home/jongsung/github/jongsung/riscv_port/xsimd/memory/../config/../types/xsimd_rvv_register.hpp:97:67: note: expanded from macro 'XSIMD_RVV_MAKE_TYPE'
   97 |         XSIMD_INLINE type bitcast<type>(type x) noexcept { return x; }                    \
      |                                                                   ^
/home/jongsung/github/jongsung/riscv_port/xsimd/memory/../config/../types/xsimd_rvv_register.hpp:118:13: error: RISC-V type 'type' (aka '__rvv_int64m8_t') requires the 'zve64x' extension
/home/jongsung/github/jongsung/riscv_port/xsimd/memory/../config/../types/xsimd_rvv_register.hpp:114:5: note: expanded from macro 'XSIMD_RVV_MAKE_TYPES'
  114 |     XSIMD_RVV_MAKE_TYPE(int64_t, i, 64, vmul)  \
      |     ^
/home/jongsung/github/jongsung/riscv_port/xsimd/memory/../config/../types/xsimd_rvv_register.hpp:97:27: note: expanded from macro 'XSIMD_RVV_MAKE_TYPE'
   97 |         XSIMD_INLINE type bitcast<type>(type x) noexcept { return x; }                    \
      |                           ^
/home/jongsung/github/jongsung/riscv_port/xsimd/memory/../config/../types/xsimd_rvv_register.hpp:118:13: error: RISC-V type 'type' (aka '__rvv_int64m8_t') requires the 'zve64x' extension
/home/jongsung/github/jongsung/riscv_port/xsimd/memory/../config/../types/xsimd_rvv_register.hpp:114:5: note: expanded from macro 'XSIMD_RVV_MAKE_TYPES'
  114 |     XSIMD_RVV_MAKE_TYPE(int64_t, i, 64, vmul)  \
      |     ^
/home/jongsung/github/jongsung/riscv_port/xsimd/memory/../config/../types/xsimd_rvv_register.hpp:97:27: note: expanded from macro 'XSIMD_RVV_MAKE_TYPE'
   97 |         XSIMD_INLINE type bitcast<type>(type x) noexcept { return x; }                    \
      |                           ^
/home/jongsung/github/jongsung/riscv_port/xsimd/memory/../config/../types/xsimd_rvv_register.hpp:118:13: error: RISC-V type 'type' (aka '__rvv_uint64m8_t') requires the 'zve64x' extension
/home/jongsung/github/jongsung/riscv_port/xsimd/memory/../config/../types/xsimd_rvv_register.hpp:115:5: note: expanded from macro 'XSIMD_RVV_MAKE_TYPES'
  115 |     XSIMD_RVV_MAKE_TYPE(uint64_t, u, 64, vmul) \
      |     ^