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Merged
jeanmon merged 9 commits into from
Feb 4, 2026
Merged

feat(avm)!: smaller precomputed trace #20144

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83ebbeb
Introduce a variable size exec_clk in execution
jeanmon Feb 3, 2026
5fac206
Rename precomputed.clk to precomputed.idx
jeanmon Feb 3, 2026
a98393e
Generated files
jeanmon Feb 3, 2026
0cd89ed
Pass next power of two to Shplemini
jeanmon Feb 3, 2026
4138e98
Addressing review feedback on prover.cpp
jeanmon Feb 3, 2026
4f79908
Addressing feedback on tracegen and adding a test
jeanmon Feb 3, 2026
1dd45a4
Addressing review feedback on pil files and other small changes
jeanmon Feb 3, 2026
347804c
Passing real size in polynomial batcher
jeanmon Feb 4, 2026
10c9a13
Addressing comments
jeanmon Feb 4, 2026
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4 changes: 2 additions & 2 deletions barretenberg/cpp/pil/vm2/alu.pil
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Original file line number Diff line number Diff line change
Expand Up @@ -254,7 +254,7 @@ pol commit max_bits;
pol commit max_value;

#[TAG_MAX_BITS_VALUE]
sel { ia_tag, max_bits, max_value } in precomputed.sel_tag_parameters { precomputed.clk, precomputed.tag_max_bits, precomputed.tag_max_value };
sel { ia_tag, max_bits, max_value } in precomputed.sel_tag_parameters { precomputed.idx, precomputed.tag_max_bits, precomputed.tag_max_value };

// OUTPUT TAG CHECKING

Expand Down Expand Up @@ -576,7 +576,7 @@ shift_lo_bits = (1 - sel_err) * (
pol SHIFT_HI_BITS = (1 - sel_err) * (max_bits - sel_shift_ops_no_overflow * shift_lo_bits);

#[SHIFTS_TWO_POW]
sel_shift_ops_no_overflow { shift_lo_bits, two_pow_shift_lo_bits } in precomputed.sel_range_8 { precomputed.clk, precomputed.power_of_2 };
sel_shift_ops_no_overflow { shift_lo_bits, two_pow_shift_lo_bits } in precomputed.sel_range_8 { precomputed.idx, precomputed.power_of_2 };

// Note on why sel_shift_ops_no_overflow is correctly constrained:
// 1) If ib < max_bits and we maliciously set sel_shift_ops_no_overflow == 0,
Expand Down
2 changes: 1 addition & 1 deletion barretenberg/cpp/pil/vm2/bitwise.pil
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Expand Up @@ -222,7 +222,7 @@ sel_get_ctr = start * (1 - err);
#[INTEGRAL_TAG_LENGTH]
sel_get_ctr { tag_a, ctr }
in
precomputed.sel_tag_parameters { precomputed.clk, precomputed.tag_byte_length };
precomputed.sel_tag_parameters { precomputed.idx, precomputed.tag_byte_length };

#[BYTE_OPERATIONS]
sel { op_id, ia_byte, ib_byte, ic_byte }
Expand Down
2 changes: 1 addition & 1 deletion barretenberg/cpp/pil/vm2/bytecode/bc_decomposition.pil
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Expand Up @@ -81,7 +81,7 @@ sel * (1 - last_of_contract) * (bytes_remaining' - bytes_remaining + 1) = 0;

// This constrains that the bytes are in the range 0 to 255.
#[BYTES_ARE_BYTES]
sel { bytes } in precomputed.sel_range_8 { precomputed.clk };
sel { bytes } in precomputed.sel_range_8 { precomputed.idx };

// These are helper columns that will be used for bytecode decomposition.
pol commit bytes_pc_plus_1, bytes_pc_plus_2, bytes_pc_plus_3, bytes_pc_plus_4, bytes_pc_plus_5,
Expand Down
2 changes: 1 addition & 1 deletion barretenberg/cpp/pil/vm2/bytecode/contract_instance_retrieval.pil
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Expand Up @@ -113,7 +113,7 @@ namespace contract_instance_retrieval;
derived_address_pi_index,
derived_address
} in public_inputs.sel {
precomputed.clk,
precomputed.idx,
public_inputs.cols[0]
};

Expand Down
6 changes: 3 additions & 3 deletions barretenberg/cpp/pil/vm2/bytecode/instr_fetching.pil
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Expand Up @@ -131,7 +131,7 @@ pol commit instr_abs_diff;
instr_abs_diff = (2 * instr_out_of_range - 1) * (instr_size - bytes_to_read) - instr_out_of_range;

#[INSTR_ABS_DIFF_POSITIVE]
sel { instr_abs_diff } in precomputed.sel_range_8 { precomputed.clk };
sel { instr_abs_diff } in precomputed.sel_range_8 { precomputed.idx };


// ****************************************************************************
Expand All @@ -150,7 +150,7 @@ tag_value = (sel_has_tag - sel_tag_is_op2) * op3 + sel_tag_is_op2 * op2;

// TODO: Investigate whether enforcing the tag checking in execution trace or in CAST/SET gadgets might be a better option.
#[TAG_VALUE_VALIDATION]
sel_has_tag { tag_value, tag_out_of_range } in precomputed.sel_range_8 { precomputed.clk, precomputed.sel_mem_tag_out_of_range };
sel_has_tag { tag_value, tag_out_of_range } in precomputed.sel_range_8 { precomputed.idx, precomputed.sel_mem_tag_out_of_range };


// ****************************************************************************
Expand Down Expand Up @@ -248,7 +248,7 @@ sel_pc_in_range {
sel_op_dc_16
} in
precomputed.sel_range_8 {
precomputed.clk,
precomputed.idx,
precomputed.opcode_out_of_range,
precomputed.exec_opcode,
precomputed.instr_size,
Expand Down
2 changes: 1 addition & 1 deletion barretenberg/cpp/pil/vm2/bytecode/update_check.pil
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Expand Up @@ -48,7 +48,7 @@ namespace update_check;
sel {
timestamp_pi_offset, timestamp
} in public_inputs.sel {
precomputed.clk, public_inputs.cols[0]
precomputed.idx, public_inputs.cols[0]
};

// ======== DELAYED PUBLIC MUTABLE HASH READ ========
Expand Down
2 changes: 1 addition & 1 deletion barretenberg/cpp/pil/vm2/calldata.pil
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Expand Up @@ -97,5 +97,5 @@ namespace calldata;
diff_context_id = latch * sel' * (context_id' - context_id - 1);

#[RANGE_CHECK_CONTEXT_ID_DIFF]
latch { diff_context_id } in precomputed.sel_range_16 { precomputed.clk };
latch { diff_context_id } in precomputed.sel_range_16 { precomputed.idx };

4 changes: 2 additions & 2 deletions barretenberg/cpp/pil/vm2/data_copy.pil
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Expand Up @@ -53,7 +53,7 @@ include "gt.pil";
*
* Usage: CD COPY
* execution.sel_calldata_copy {
* precomputed.clk,
* clk,
* parent_id, context_id,
* reg[0], reg[1], rop[2],
* parent_calldata_addr, parent_calldata_size,
Expand All @@ -70,7 +70,7 @@ include "gt.pil";
*
* Usage: RD COPY
* execution.sel_returndata_copy {
* precomputed.clk,
* clk,
* last_child_id, context_id,
* reg[0], reg[1], rop[2],
* last_child_returndata_addr, last_child_returndata_size,
Expand Down
2 changes: 1 addition & 1 deletion barretenberg/cpp/pil/vm2/ecc_mem.pil
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Expand Up @@ -21,7 +21,7 @@ include "precomputed.pil";
* USAGE: Dispatching lookup defined in execution.pil:
* #[DISPATCH_TO_ECC_ADD]
* sel_exec_dispatch_ecc_add {
* precomputed.clk, context_id,
* clk, context_id,
* register[0], register[1], register[2], // Point P
* register[3], register[4], register[5], // Point Q
* rop[6], // Dst address
Expand Down
34 changes: 22 additions & 12 deletions barretenberg/cpp/pil/vm2/execution.pil
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Expand Up @@ -134,6 +134,16 @@ sel_first_row_in_context' = sel_enter_call + enqueued_call_start';
#[TRACE_CONTINUITY]
(1 - sel) * (1 - precomputed.first_row) * sel' = 0;

pol commit clk;

// Initialize clk to 0 on the first row and at the same time enforces that clk is 0 if sel = 0.
#[EXEC_CLK_INIT]
(1 - sel) * clk = 0;

#[EXEC_CLK_CONTINUITY]
sel' * (clk + 1 - clk') = 0;


/**************************************************************************************************
* Temporality group 1: Bytecode retrieval (unconditional)
**************************************************************************************************/
Expand Down Expand Up @@ -306,7 +316,7 @@ sel_instruction_fetching_success {
} in
precomputed.sel_exec_spec {
// execution opcode
precomputed.clk,
precomputed.idx,
// gas
precomputed.exec_opcode_opcode_gas,
precomputed.exec_opcode_base_da_gas,
Expand Down Expand Up @@ -449,7 +459,7 @@ sel_gas_sstore * constants.AVM_DYN_GAS_ID_SSTORE
#[DYN_L2_FACTOR_BITWISE]
sel_gas_bitwise { mem_tag_reg[0], dynamic_l2_gas_factor }
in
precomputed.sel_tag_parameters { precomputed.clk, precomputed.tag_byte_length };
precomputed.sel_tag_parameters { precomputed.idx, precomputed.tag_byte_length };

//////////////////////////////////////////
// ToRadixBE, Dynamic L2 Gas Calculation
Expand Down Expand Up @@ -489,7 +499,7 @@ sel_gas_to_radix * sel_radix_gt_256 * (num_p_limbs - 32) = 0;
sel_lookup_num_p_limbs { /*radix=*/register[1], num_p_limbs }
in
precomputed.sel_to_radix_p_limb_counts
{ precomputed.clk, precomputed.to_radix_num_limbs_for_p };
{ precomputed.idx, precomputed.to_radix_num_limbs_for_p };

// We now compute the dynamic l2 gas factor as max(num_limbs, num_p_limbs)
// The easiest way to do this is to check if `num_limbs > num_p_limbs`.
Expand Down Expand Up @@ -909,7 +919,7 @@ sel_exec_dispatch_cast {

#[DISPATCH_TO_CD_COPY]
sel_exec_dispatch_calldata_copy {
precomputed.clk,
clk,
parent_id, context_id,
register[0], register[1], rop[2],
parent_calldata_addr, parent_calldata_size,
Expand All @@ -924,7 +934,7 @@ sel_exec_dispatch_calldata_copy {

#[DISPATCH_TO_RD_COPY]
sel_exec_dispatch_returndata_copy {
precomputed.clk,
clk,
last_child_id, context_id,
register[0], register[1], rop[2],
last_child_returndata_addr, last_child_returndata_size,
Expand Down Expand Up @@ -964,7 +974,7 @@ sel_exec_dispatch_set {
#[DISPATCH_TO_GET_CONTRACT_INSTANCE]
sel_exec_dispatch_get_contract_instance {
// inputs
precomputed.clk,
clk,
/*contract_address=*/ register[0],
/*dst_offset=*/ rop[1],
/*member_enum=*/ rop[2],
Expand All @@ -988,7 +998,7 @@ sel_exec_dispatch_get_contract_instance {

#[DISPATCH_TO_EMIT_UNENCRYPTED_LOG]
sel_exec_dispatch_emit_unencrypted_log {
precomputed.clk,
clk,
context_id,
// Message offset
rop[1],
Expand Down Expand Up @@ -1017,7 +1027,7 @@ sel_exec_dispatch_emit_unencrypted_log {

#[DISPATCH_TO_POSEIDON2_PERM]
sel_exec_dispatch_poseidon2_perm {
precomputed.clk,
clk,
context_id,
rop[0],
rop[1],
Expand All @@ -1032,14 +1042,14 @@ sel_exec_dispatch_poseidon2_perm {

#[DISPATCH_TO_SHA256_COMPRESSION]
sel_exec_dispatch_sha256_compression {
precomputed.clk, context_id, rop[0], rop[1], rop[2], sel_opcode_error
clk, context_id, rop[0], rop[1], rop[2], sel_opcode_error
} is sha256.start {
sha256.execution_clk, sha256.space_id, sha256.output_addr, sha256.state_addr, sha256.input_addr, sha256.err
};

#[DISPATCH_TO_KECCAKF1600]
sel_exec_dispatch_keccakf1600 {
precomputed.clk, rop[0], rop[1], context_id, sel_opcode_error
clk, rop[0], rop[1], context_id, sel_opcode_error
} is keccakf1600.start {
keccakf1600.clk, keccakf1600.dst_addr, keccakf1600.src_addr, keccakf1600.space_id, keccakf1600.error
};
Expand All @@ -1053,7 +1063,7 @@ sel_exec_dispatch_keccakf1600 {

#[DISPATCH_TO_ECC_ADD]
sel_exec_dispatch_ecc_add {
precomputed.clk,
clk,
context_id,
// Point P
register[0],
Expand Down Expand Up @@ -1086,7 +1096,7 @@ sel_exec_dispatch_ecc_add {

#[DISPATCH_TO_TO_RADIX]
sel_exec_dispatch_to_radix {
precomputed.clk,
clk,
context_id,
register[0],
register[1],
Expand Down
16 changes: 8 additions & 8 deletions barretenberg/cpp/pil/vm2/execution/addressing.pil
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Expand Up @@ -160,7 +160,7 @@ pol NUM_RELATIVE_E = 1 - sel_do_base_check;
NUM_RELATIVE_X * (NUM_RELATIVE_E * (1 - NUM_RELATIVE_Y) + NUM_RELATIVE_Y) - 1 + NUM_RELATIVE_E = 0;

#[BASE_ADDRESS_FROM_MEMORY]
sel_do_base_check { precomputed.clk, context_id, /*address=*/precomputed.zero, /*value=*/base_address_val, /*tag=*/base_address_tag, /*rw=*/precomputed.zero/*(read)*/ }
sel_do_base_check { clk, context_id, /*address=*/precomputed.zero, /*value=*/base_address_val, /*tag=*/base_address_tag, /*rw=*/precomputed.zero/*(read)*/ }
is memory.sel_addressing_base { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };

// This error will be true iff the base address is not valid AND we actually checked it.
Expand Down Expand Up @@ -291,25 +291,25 @@ pol commit rop_tag[7];
// If indirection is applied, we need to lookup the value from memory.
// If sel_should_apply_indirection is 1, then we know the address is valid therefore we can make the permutations.
#[INDIRECT_FROM_MEMORY_0]
sel_should_apply_indirection[0] { precomputed.clk, context_id, /*address=*/op_after_relative[0], /*value=*/rop[0], /*tag=*/rop_tag[0], /*rw=*/precomputed.zero/*(read)*/ }
sel_should_apply_indirection[0] { clk, context_id, /*address=*/op_after_relative[0], /*value=*/rop[0], /*tag=*/rop_tag[0], /*rw=*/precomputed.zero/*(read)*/ }
is memory.sel_addressing_indirect[0] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };
#[INDIRECT_FROM_MEMORY_1]
sel_should_apply_indirection[1] { precomputed.clk, context_id, /*address=*/op_after_relative[1], /*value=*/rop[1], /*tag=*/rop_tag[1], /*rw=*/precomputed.zero/*(read)*/ }
sel_should_apply_indirection[1] { clk, context_id, /*address=*/op_after_relative[1], /*value=*/rop[1], /*tag=*/rop_tag[1], /*rw=*/precomputed.zero/*(read)*/ }
is memory.sel_addressing_indirect[1] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };
#[INDIRECT_FROM_MEMORY_2]
sel_should_apply_indirection[2] { precomputed.clk, context_id, /*address=*/op_after_relative[2], /*value=*/rop[2], /*tag=*/rop_tag[2], /*rw=*/precomputed.zero/*(read)*/ }
sel_should_apply_indirection[2] { clk, context_id, /*address=*/op_after_relative[2], /*value=*/rop[2], /*tag=*/rop_tag[2], /*rw=*/precomputed.zero/*(read)*/ }
is memory.sel_addressing_indirect[2] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };
#[INDIRECT_FROM_MEMORY_3]
sel_should_apply_indirection[3] { precomputed.clk, context_id, /*address=*/op_after_relative[3], /*value=*/rop[3], /*tag=*/rop_tag[3], /*rw=*/precomputed.zero/*(read)*/ }
sel_should_apply_indirection[3] { clk, context_id, /*address=*/op_after_relative[3], /*value=*/rop[3], /*tag=*/rop_tag[3], /*rw=*/precomputed.zero/*(read)*/ }
is memory.sel_addressing_indirect[3] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };
#[INDIRECT_FROM_MEMORY_4]
sel_should_apply_indirection[4] { precomputed.clk, context_id, /*address=*/op_after_relative[4], /*value=*/rop[4], /*tag=*/rop_tag[4], /*rw=*/precomputed.zero/*(read)*/ }
sel_should_apply_indirection[4] { clk, context_id, /*address=*/op_after_relative[4], /*value=*/rop[4], /*tag=*/rop_tag[4], /*rw=*/precomputed.zero/*(read)*/ }
is memory.sel_addressing_indirect[4] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };
#[INDIRECT_FROM_MEMORY_5]
sel_should_apply_indirection[5] { precomputed.clk, context_id, /*address=*/op_after_relative[5], /*value=*/rop[5], /*tag=*/rop_tag[5], /*rw=*/precomputed.zero/*(read)*/ }
sel_should_apply_indirection[5] { clk, context_id, /*address=*/op_after_relative[5], /*value=*/rop[5], /*tag=*/rop_tag[5], /*rw=*/precomputed.zero/*(read)*/ }
is memory.sel_addressing_indirect[5] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };
#[INDIRECT_FROM_MEMORY_6]
sel_should_apply_indirection[6] { precomputed.clk, context_id, /*address=*/op_after_relative[6], /*value=*/rop[6], /*tag=*/rop_tag[6], /*rw=*/precomputed.zero/*(read)*/ }
sel_should_apply_indirection[6] { clk, context_id, /*address=*/op_after_relative[6], /*value=*/rop[6], /*tag=*/rop_tag[6], /*rw=*/precomputed.zero/*(read)*/ }
is memory.sel_addressing_indirect[6] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };

// Otherwise, if indirection is not applied, we propagate the operands from the previous step.
Expand Down
2 changes: 1 addition & 1 deletion barretenberg/cpp/pil/vm2/execution/gas.pil
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Expand Up @@ -43,7 +43,7 @@ namespace execution;
#[ADDRESSING_GAS_READ]
sel_should_check_gas { addressing_mode, addressing_gas }
in
precomputed.sel_addressing_gas { precomputed.clk, precomputed.addressing_gas };
precomputed.sel_addressing_gas { precomputed.idx, precomputed.addressing_gas };

pol BASE_L2_GAS = opcode_gas + addressing_gas;

Expand Down
24 changes: 12 additions & 12 deletions barretenberg/cpp/pil/vm2/execution/registers.pil
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Expand Up @@ -63,23 +63,23 @@ sel_op_reg_effective[5] = sel_mem_op_reg[5] * (sel_should_read_registers * (1 -
// That's why we have to properly activate them with the above selectors, which take into account
// whether we have reached a given phase.
#[MEM_OP_0]
sel_op_reg_effective[0] { precomputed.clk, context_id, rop[0], register[0], mem_tag_reg[0], rw_reg[0] }
is memory.sel_register_op[0] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };
sel_op_reg_effective[0] { clk, context_id, rop[0], register[0], mem_tag_reg[0], rw_reg[0] }
is memory.sel_register_op[0] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };
#[MEM_OP_1]
sel_op_reg_effective[1] { precomputed.clk, context_id, rop[1], register[1], mem_tag_reg[1], rw_reg[1] }
is memory.sel_register_op[1] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };
sel_op_reg_effective[1] { clk, context_id, rop[1], register[1], mem_tag_reg[1], rw_reg[1] }
is memory.sel_register_op[1] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };
#[MEM_OP_2]
sel_op_reg_effective[2] { precomputed.clk, context_id, rop[2], register[2], mem_tag_reg[2], rw_reg[2] }
is memory.sel_register_op[2] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };
sel_op_reg_effective[2] { clk, context_id, rop[2], register[2], mem_tag_reg[2], rw_reg[2] }
is memory.sel_register_op[2] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };
#[MEM_OP_3]
sel_op_reg_effective[3] { precomputed.clk, context_id, rop[3], register[3], mem_tag_reg[3], rw_reg[3] }
is memory.sel_register_op[3] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };
sel_op_reg_effective[3] { clk, context_id, rop[3], register[3], mem_tag_reg[3], rw_reg[3] }
is memory.sel_register_op[3] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };
#[MEM_OP_4]
sel_op_reg_effective[4] { precomputed.clk, context_id, rop[4], register[4], mem_tag_reg[4], rw_reg[4] }
is memory.sel_register_op[4] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };
sel_op_reg_effective[4] { clk, context_id, rop[4], register[4], mem_tag_reg[4], rw_reg[4] }
is memory.sel_register_op[4] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };
#[MEM_OP_5]
sel_op_reg_effective[5] { precomputed.clk, context_id, rop[5], register[5], mem_tag_reg[5], rw_reg[5] }
is memory.sel_register_op[5] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };
sel_op_reg_effective[5] { clk, context_id, rop[5], register[5], mem_tag_reg[5], rw_reg[5] }
is memory.sel_register_op[5] { memory.clk, memory.space_id, memory.address, memory.value, memory.tag, memory.rw };

// This error is true iff the following "batch" check failed. That is if some tag is not the expected one.
// Observe that we don't need to know exactly which one failed.
Expand Down
2 changes: 1 addition & 1 deletion barretenberg/cpp/pil/vm2/keccakf1600.pil
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Expand Up @@ -1285,7 +1285,7 @@ pol commit round_cst;
pol commit state_iota_00;

#[ROUND_CST]
sel_no_error { round, round_cst } in precomputed.sel_keccak { precomputed.clk, precomputed.keccak_round_constant };
sel_no_error { round, round_cst } in precomputed.sel_keccak { precomputed.idx, precomputed.keccak_round_constant };

#[STATE_IOTA_00]
sel_no_error { bitwise_xor_op_id, state_chi_00, round_cst, state_iota_00, tag_u64 } in
Expand Down
8 changes: 4 additions & 4 deletions barretenberg/cpp/pil/vm2/memory.pil
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Expand Up @@ -218,11 +218,11 @@ diff = limb[0] + limb[1] * 2**16 + limb[2] * 2**32;
// Range check limbs

#[RANGE_CHECK_LIMB_0]
sel_rng_chk { limb[0] } in precomputed.sel_range_16 { precomputed.clk };
sel_rng_chk { limb[0] } in precomputed.sel_range_16 { precomputed.idx };
#[RANGE_CHECK_LIMB_1]
sel_rng_chk { limb[1] } in precomputed.sel_range_16 { precomputed.clk };
sel_rng_chk { limb[1] } in precomputed.sel_range_16 { precomputed.idx };
#[RANGE_CHECK_LIMB_2]
sel_rng_chk { limb[2] } in precomputed.sel_range_16 { precomputed.clk };
sel_rng_chk { limb[2] } in precomputed.sel_range_16 { precomputed.idx };

// Memory Initialization
#[MEMORY_INIT_VALUE]
Expand Down Expand Up @@ -255,7 +255,7 @@ sel_rng_write = rw * (1 - sel_tag_is_ff);
#[TAG_MAX_BITS]
sel_rng_write { tag, max_bits }
in
precomputed.sel_tag_parameters { precomputed.clk, precomputed.tag_max_bits };
precomputed.sel_tag_parameters { precomputed.idx, precomputed.tag_max_bits };

// Range check for the tagged value validation
#[RANGE_CHECK_WRITE_TAGGED_VALUE]
Expand Down
2 changes: 1 addition & 1 deletion barretenberg/cpp/pil/vm2/opcodes/emit_unencrypted_log.pil
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Original file line number Diff line number Diff line change
Expand Up @@ -290,6 +290,6 @@ namespace emit_unencrypted_log;
public_inputs_value
} in
public_inputs.sel {
precomputed.clk,
precomputed.idx,
public_inputs.cols[0]
};
4 changes: 2 additions & 2 deletions barretenberg/cpp/pil/vm2/opcodes/get_contract_instance.pil
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Original file line number Diff line number Diff line change
Expand Up @@ -54,7 +54,7 @@ include "../bytecode/contract_instance_retrieval.pil";
*
* sel_exec_dispatch_get_contract_instance {
* // inputs
* precomputed.clk,
* clk,
* register[0],
* rop[1],
* rop[2],
Expand Down Expand Up @@ -130,7 +130,7 @@ namespace get_contract_instance;
is_init_hash
} in precomputed.sel_range_8 {
// inputs
precomputed.clk,
precomputed.idx,
// outputs
precomputed.is_valid_member_enum,
precomputed.is_deployer,
Expand Down
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